ABSTRAKSI: Secara umum blok system komunikasi dibagi menjadi 3 bagian yakni transmitter (pengirim), channel (kanal) dan receiver (penerima). Pada realitanya ketiga bagian ini tidak ideal, disebabkan oleh factor seperti noise, interferensi maupun ketidaksempurnaan perangkat itu sendiri. Factor-faktor ini menyebabkan menurunnya performansi signal output pada receiver. Dengan kata lain performansi signal output pada receiver tidak hanya disebabkan karena adanya noise maupun signal interference, melainkan juga karena adanya ketidasempurnaan didalam perangkat receiver tersebut. Pada receiver terdapat demodulator yang berfungsi untuk mendeteksi signal yang dikirim oleh transmitter. Fungsi deteksi ini dilakukan oleh carrier recovery dengan melakukan synchronisasi antara signal yang diterima terhadap signal referensi.
Pada tugas akhir ini membahas pada ketidaksempurnaan receiver yang di tinjau dari phasa carrier recovery dan phasa clock recovery. Error fasa merupakan perbedaan fasa carrier recovery pada kondisi ideal terhadap kondisi tidak ideal. Pada kondisi ideal perbedaan Phasa carrier di lengan inphase dan lengan quadrature adalah 90o, tetapi pada percobaan ini dianalisa jika perbedaan phasa tersebut bukan 90o . Demikian juga pada phasa clock recovery, pada saat kondisi ideal clock recovery tepat pada titik awal setiap symbol, tetapi pada percobaan ini dilanalisa bagaimana jika clock teresebut tidak tepat pada titik awal setiap symbol. Hal ini dilakukan untuk melihat seberapa besar pengaruh ketidaksempurnaan demodulator terhadap performansi sinyal, yang kemudian dapat digunakan sebagai antisipasi untuk mempertahankan kualitas sinyal yang telah ditentukan.
Performansi system ditunjukkan melalui parameter BER (Bit Error Rate) terhadap SNR (signal to noise ratio). Nilai BER diperoleh dengan mengubah-ubah nilai phase dan timing sebagai asumsi seperti telah dijelaskan diatas. Pertimbangan perubahan nilai phase dan timing dilihat dari perubahan nilai SNR yang masih dapat ditoleransi. Toleransi besar error phasa terletak pada nilai error phasa 15, toleransi besar error clock (STR/symbol timing recovery) terletak pada nilai error clock (STR) 30%, toleransi besar error clock (STR) dengan kondisi error phasa carrier recovery 5o terletak pada nilai error clock (STR) 20%,dan toleransi besar error phasa carrier recovery dengan kondisi error clock (STR) 10% terletak pada nilai 15.Kata Kunci : Kata kunci : receiver, carrier recovery, phase recovery, symbol timing recovery, QPSK (Quadrature Phase Shift Keying), BER (Bit Error Rate), SNR (signal to noise ratio).ABSTRACT: Generally, communication system block is divided into three parts, namely the transmitter (sender), channel (channel) and receiver (receiver). In all three parts of this reality is not ideal, is caused by factors such as noise, interference or imperfections of the device itself. These factors caused the deterioration of performance of the output signal at the receiver. In other words the output signal at the receiver performance is not only due to the noise and signal interference, but also because of the existence of such receivers ketidasempurnaan inside the device. Demodulator at the receiver there is a function to detect signals sent by the transmitter. Detection function is performed by the carrier recovery by performing synchronization between the received signal against a reference signal.
In this thesis discussing the imperfections of the receiver that the review phase carrier recovery and clock recovery phase. Phase error is the difference of carrier phase recovery in ideal conditions of the condition is not ideal. In ideal conditions on the arm carrier phase difference inphase and quadrature arm is 90 °, but in this experiment were analyzed if the phase difference is not a 90o. Likewise, the clock recovery phase, when the ideal conditions appropriate clock recovery at the point of beginning of each symbol, but in these experiments teresebut dilanalisa what if the clock is not exactly at the point of beginning of each symbol. This is done to see how much influence the performance of signal demodulator imperfections, which can then be used as an anticipation to maintain a predetermined signal quality.
System performance parameters indicated by the BER (Bit Error Rate) to SNR (signal to noise ratio). BER is obtained by varying the phase and timing values as the assumptions as explained above. Consideration of changes in phase and timing views of the SNR value changes can still be tolerated. Greater tolerance phase error lies in the phase error value 15 °, clock tolerance of these errors (STR / symbol timing recovery) is located at the clock error value (STR) 30%, greater tolerance of error clock (STR) with carrier recovery phase error conditions 5 ° lies in the value of a clock error (STR) 20% and greater tolerance to carrier recovery phase error condition of a clock error (STR) 10% lies in the value 15 °.Keyword: Key Words : receiver, carrier recovery, phase recovery, timing recovery, QPSK (Quadrature Phase Shift Keying), BER (Bit Error Rate)